The present invention relates to digital signal processors, DSP, and more particularly to the LSI implementation of a DSP, based upon ASIC, application specific integrated circuit.
Digital signal processors could perform various processes on digital signals, including digital computation and conversion based upon retrieval, filtering, equalization, the removal of noise or echoes, modulation, Fourier transformations, the extraction of the characteristic parameter of a signal, prediction, picture emphasis, etc. In order to execute such digital signal processes in real time or at high speed, various digital signal processors have been provided.
For the purpose of obtaining a high processing ability in the limited field of the digital signal processor, a special architecture has been adopted, by way of example, involving a data memory, a program memory and buses interrelating these, whereby the data bus is separate from the program memory bus, for parallel processing in this high speed. Therefore, it is possible to perform an instruction fetch, a data transfer and a computation in parallel with each other through a pipeline process. A multi-port memory is packaged in the DSP, and the data bus is preferably divided into a plurality of parts, thereby making it possible to transfer a plurality of data items in parallel, although such parallel data bus is not essential to the basic DSP. Further, a DSP may have a multiplier unit in addition to the adder unit of the ALU, which multiplier unit and ALU unit are individually disposed for parallel connection to the data memory to simultaneously receive plural items, each from the data memory, for execution of multiplying and adding operations at high frequencies in parallel.
In such a high speed digital processor, the internal data bus thereof need not be directly open to the exterior, so that the host interface portion of the processor is constructed of registers, so that data is transferred between these registers and the interior of the DSP through dedicated instruction such as register transfer instructions, all so that the DSP may operate at the required high processing speed.
The DSP is further disclosed, in general, in "Nikkei Electronics", published by Nikkei McGraw-Hill Inc., August 1986, pp. 183-184.